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apple/swift 55769

The Swift Programming Language

apple/swift-evolution 12168

This maintains proposals for changes and user-visible enhancements to the Swift Programming Language.

llvm/llvm-project 8576

The LLVM Project is a collection of modular and reusable compiler and toolchain technologies. Note: the repository does not accept github pull requests at this moment. Please submit your patches at http://reviews.llvm.org.

apple/swift-package-manager 8244

The Package Manager for the Swift Programming Language

apple/swift-corelibs-foundation 4250

The Foundation Project, providing core utilities, internationalization, and OS independence

apple/swift-corelibs-libdispatch 2023

The libdispatch Project, (a.k.a. Grand Central Dispatch), for concurrency on multicore hardware

apple/swift-corelibs-xctest 894

The XCTest Project, A Swift core library for providing unit test support

apple/swift-llbuild 849

A low-level build system, used by Xcode and the Swift Package Manager

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PR opened apple/swift-evolution

[TaskLocals] v4: @TaskLocal, binding through UnsafeCurrentTask, copy propagation

Massive changes of surface API:

  • defining keys is now done via @TaskLocal wrappers
  • added ability to bind values in synchronous functions through the UnsafeCurrentTask API; it is unsafe-ish because it can be abused and must use unsafe tasks
  • cleanup of wording to use the new terminology
  • add the future options to future work
  • allude to https://github.com/apple/swift/pull/37007 [Concurrency] Add "async" operation for continuing work asynchronously. #37007 rather than saying we'd propagate values to detached tasks (which we do not want)

This is all implemented in:

  • https://github.com/apple/swift/pull/36959

We need to decide if we should implement erroring if they're defined as non-static. We could implement it via a similar subscript like we do _enclosingInstance but say there that the instance is Void or Never.

Thank you @hborla for the help on the property wrapper design.

+406 -197

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pull request commentllvm/circt

[FIRRTL] Fix `is invalid` on duplex types and bundles

The new python-format checker isn't working properly, but besides that the CI passed.

youngar

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Pull request review commentllvm/circt

[FIRRTL] Fix `is invalid` on duplex types and bundles

 struct FIRStmtParser : public FIRScopedParser {   /// a passive-typed value and return that.   Value convertToPassive(Value input, Location loc); +  /// Attach invalid values to every element of the value.+  void emitInvalidate(Value val, Location loc, bool isDuplex) {+    // Invalidate doesn't match the semantics of connect or partial connect, and+    // so we have to manually do something like expand-connects. Invalid value+    // needs to be connected to every field of a bundle which is flip, or+    // every field in a duplex operation.+    auto invalidType = val.getType().cast<FIRRTLType>();+    if (invalidType.isa<AnalogType>()) {+      // Analog types must be 'attach'ed, not connected.+      auto invalidVal =+          builder.create<InvalidValuePrimOp>(loc, invalidType.getPassiveType());+      builder.create<AttachOp>(loc, ValueRange{val, invalidVal});

I started dropping the attaches.

Note to self: I need to fix the expand-whens initialization checking here, right now it would complain about an analog wire with no connections.

youngar

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John Demme

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Fix test

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John Demme

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Adding `operation()` method

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Pull request review commentllvm/circt

[FIRRTL] Fix `is invalid` on duplex types and bundles

 struct FIRStmtParser : public FIRScopedParser {   /// a passive-typed value and return that.   Value convertToPassive(Value input, Location loc); +  /// Attach invalid values to every element of the value.+  void emitInvalidate(Value val, Location loc, bool isDuplex) {+    // Invalidate doesn't match the semantics of connect or partial connect, and+    // so we have to manually do something like expand-connects. Invalid value+    // needs to be connected to every field of a bundle which is flip, or+    // every field in a duplex operation.+    auto invalidType = val.getType().cast<FIRRTLType>();+    if (invalidType.isa<AnalogType>()) {+      // Analog types must be 'attach'ed, not connected.+      auto invalidVal =+          builder.create<InvalidValuePrimOp>(loc, invalidType.getPassiveType());+      builder.create<AttachOp>(loc, ValueRange{val, invalidVal});+    } else if (auto bundleType = invalidType.dyn_cast<BundleType>()) {+      // We need to recurse into bundle types without an outer flip.  They could+      // have inner flips or analog types.+      for (auto element : bundleType.getElements()) {+        auto elementVal = builder.create<SubfieldOp>(loc, val, element.name);+        emitInvalidate(elementVal, loc, isDuplex);+      }+    } else if (invalidType.isa<FlipType>() || isDuplex) {

This only works when the bundle has an outer flip. There is an inefficiency here that I was too lazy/ it was too ugly to fix: It doesn't do the same sort of thing for a wire with non-flipped fields, it will generate a separate subfield+connect for each field :(

youngar

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pull request commentllvm/circt

[RTL][Python] Add InstanceBuilder for constructing instances.

@teqdruid here's the patch for PyValue <> MlirValue interop: https://github.com/circt/llvm/commit/5fab6d398c57127072019449b4c5b4d4db434b04

Also bumped to ref in this PR, so you should be able to pull down this branch if you want to test.

mikeurbach

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Mike Urbach

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Clean up, tests passing.

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Mike Urbach

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Check in ref to staged LLVM patch for PyValue capsules.

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Pull request review commentllvm/circt

[FIRRTL] Fix `is invalid` on duplex types and bundles

 struct FIRStmtParser : public FIRScopedParser {   /// a passive-typed value and return that.   Value convertToPassive(Value input, Location loc); +  /// Attach invalid values to every element of the value.+  void emitInvalidate(Value val, Location loc, bool isDuplex) {+    // Invalidate doesn't match the semantics of connect or partial connect, and+    // so we have to manually do something like expand-connects. Invalid value+    // needs to be connected to every field of a bundle which is flip, or+    // every field in a duplex operation.+    auto invalidType = val.getType().cast<FIRRTLType>();+    if (invalidType.isa<AnalogType>()) {+      // Analog types must be 'attach'ed, not connected.+      auto invalidVal =+          builder.create<InvalidValuePrimOp>(loc, invalidType.getPassiveType());+      builder.create<AttachOp>(loc, ValueRange{val, invalidVal});

Invalid values of Analog type get lowered to a wire with nothing connected to them.

youngar

comment created time in 4 hours

Pull request review commentllvm/circt

[RTL][Python] Add InstanceBuilder for constructing instances.

+//===- SupportModule.cpp - Support API pybind module ----------------------===//+//+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.+// See https://llvm.org/LICENSE.txt for license information.+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception+//+//===----------------------------------------------------------------------===//++#include "SupportModule.h"++#include "circt/Support/BackedgeBuilder.h"+#include "circt/Support/LLVM.h"++#include "mlir-c/IR.h"+#include "mlir/CAPI/IR.h"+#include "mlir/IR/Builders.h"+#include "mlir/IR/Dialect.h"++#include "PybindUtils.h"+#include "pybind11/pybind11.h"+namespace py = pybind11;++using namespace circt;++//===----------------------------------------------------------------------===//+// Classes that translate from something Pybind11 understands to MLIR C++.+//===----------------------------------------------------------------------===//++namespace {++class PyBackedge {+public:+  PyBackedge(Backedge backedge) : backedge(backedge) {}++  MlirValue value() { return wrap(backedge); }++  void setValue(MlirValue newValue) { backedge.setValue(unwrap(newValue)); }++private:+  Backedge backedge;

Yep, you're right. And I hear you about the duplication.

mikeurbach

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Pull request review commentllvm/circt

[RTL][Python] Add InstanceBuilder for constructing instances.

+//===- SupportModule.cpp - Support API pybind module ----------------------===//+//+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.+// See https://llvm.org/LICENSE.txt for license information.+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception+//+//===----------------------------------------------------------------------===//++#include "SupportModule.h"++#include "circt/Support/BackedgeBuilder.h"+#include "circt/Support/LLVM.h"++#include "mlir-c/IR.h"+#include "mlir/CAPI/IR.h"+#include "mlir/IR/Builders.h"+#include "mlir/IR/Dialect.h"++#include "PybindUtils.h"+#include "pybind11/pybind11.h"+namespace py = pybind11;++using namespace circt;++//===----------------------------------------------------------------------===//+// Classes that translate from something Pybind11 understands to MLIR C++.+//===----------------------------------------------------------------------===//++namespace {++class PyBackedge {+public:+  PyBackedge(Backedge backedge) : backedge(backedge) {}++  MlirValue value() { return wrap(backedge); }++  void setValue(MlirValue newValue) { backedge.setValue(unwrap(newValue)); }++private:+  Backedge backedge;

So far, this seems to work. This member is technically storing an mlir::Value, but I know what you meant. If there is an issue with this approach, and we want to go this route, I can make this a proper C API that only stores the MlirValue struct.

I did consider just replicating this functionality in Python, and it is definitely doable. The duplication didn't sit right with me, so I whipped up this module. Happy to do it just in Python. I think we will end up at least needing to extend what is in this current module at the Python level to make the error reporting nicer. At that point, it may be simpler to just do it all in Python.

I think there still needs to be an upstream change either way. You can see here a commented out line where at one point I wasn't even using the backedge to set the value: https://github.com/llvm/circt/pull/940/files#diff-45ef9b344a85b7561366d5f9457f7de8579b64d97164cf4e4adc21462b11ef1bR102. Something like that is nice, except that API doesn't exist upstream. Whether we add that API, use the backedge to set the value, or do something else, the bottom line is there is no way right now to pass PyValue <> MlirValue back and forth from Python to C++ pybind modules, and I think anything we do here is going to require that.

mikeurbach

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Pull request review commentllvm/circt

[RTL][Python] Add InstanceBuilder for constructing instances.

 def top(a, b):       a, b = swap(a, b)       return a, b +    # CHECK-LABEL: rtl.module @instance_builder_tests+    instance_builder_tests = rtl.RTLModuleOp(name="instance_builder_tests")+    one_input = rtl.RTLModuleOp(+        name="one_input",+        input_ports=[("a", i32)],+        body_builder=lambda m: rtl.OutputOp([]),+    )+    two_inputs = rtl.RTLModuleOp(+        name="two_inputs",+        input_ports=[("a", i32), ("b", i32)],+        body_builder=lambda m: rtl.OutputOp([]),+    )+    one_output = rtl.RTLModuleOp(+        name="one_output",+        output_ports=[("a", i32)],+        body_builder=lambda m: rtl.OutputOp(+            [rtl.ConstantOp(i32, IntegerAttr.get(i32, 46)).result]),+    )++    with InsertionPoint(instance_builder_tests.add_entry_block()):+      # CHECK: %[[INST1_RESULT:.+]] = rtl.instance "inst1" @one_output()+      inst1 = one_output.create("inst1")++      # CHECK: rtl.instance "inst2" @one_input(%[[INST1_RESULT]])+      inst2 = one_input.create("inst2", {"a": inst1.a})++      # CHECK-NOT: rtl.instance "inst3"+      inst3 = two_inputs.create("inst3", {"a": inst1.a})++      # CHECK: rtl.instance "inst4" @two_inputs(%[[INST1_RESULT]], %[[INST1_RESULT]])+      inst4 = two_inputs.create("inst4", {"a": inst1.a})+      inst4.b = inst1.a++      inst5 = op.create("inst5")+      inst5.my_input = inst5.my_output

Using = to connect stuff is slick, though I'm not sure how I feel about it. We should ask about it during our demo tomorrow to see what RTL devs think.

mikeurbach

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pull request commentllvm/circt

[FIRRTL] Fix `is invalid` on duplex types and bundles

consider moving this into lower types at a later point.

Yeah, this definitely doesn't feel right to have in the parser. Right now I'm treating a connect to invalidValue as equivalent to connecting to 0. I don't know if there is a way we can emit a single connect without interpreting a connection to invalidvalue differently than a normal value.

youngar

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Pull request review commentllvm/circt

[FIRRTL] Fix `is invalid` on duplex types and bundles

 struct FIRStmtParser : public FIRScopedParser {   /// a passive-typed value and return that.   Value convertToPassive(Value input, Location loc); +  /// Attach invalid values to every element of the value.+  void emitInvalidate(Value val, Location loc, bool isDuplex) {+    // Invalidate doesn't match the semantics of connect or partial connect, and+    // so we have to manually do something like expand-connects. Invalid value+    // needs to be connected to every field of a bundle which is flip, or+    // every field in a duplex operation.+    auto invalidType = val.getType().cast<FIRRTLType>();+    if (invalidType.isa<AnalogType>()) {+      // Analog types must be 'attach'ed, not connected.+      auto invalidVal =+          builder.create<InvalidValuePrimOp>(loc, invalidType.getPassiveType());+      builder.create<AttachOp>(loc, ValueRange{val, invalidVal});+    } else if (auto bundleType = invalidType.dyn_cast<BundleType>()) {+      // We need to recurse into bundle types without an outer flip.  They could+      // have inner flips or analog types.+      for (auto element : bundleType.getElements()) {+        auto elementVal = builder.create<SubfieldOp>(loc, val, element.name);+        emitInvalidate(elementVal, loc, isDuplex);+      }+    } else if (invalidType.isa<FlipType>() || isDuplex) {

:100:

youngar

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Pull request review commentllvm/circt

[FIRRTL] Fix `is invalid` on duplex types and bundles

 struct FIRStmtParser : public FIRScopedParser {   /// a passive-typed value and return that.   Value convertToPassive(Value input, Location loc); +  /// Attach invalid values to every element of the value.+  void emitInvalidate(Value val, Location loc, bool isDuplex) {+    // Invalidate doesn't match the semantics of connect or partial connect, and+    // so we have to manually do something like expand-connects. Invalid value+    // needs to be connected to every field of a bundle which is flip, or+    // every field in a duplex operation.+    auto invalidType = val.getType().cast<FIRRTLType>();+    if (invalidType.isa<AnalogType>()) {+      // Analog types must be 'attach'ed, not connected.+      auto invalidVal =+          builder.create<InvalidValuePrimOp>(loc, invalidType.getPassiveType());+      builder.create<AttachOp>(loc, ValueRange{val, invalidVal});

Wow I was wondering how this was supposed to work. Does this mean any attach to an invalid value should be dropped? I haven't checked, but are we outputting incorrect attaches to 0 right now?

youngar

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Pull request review commentllvm/circt

[RTL][Python] Add InstanceBuilder for constructing instances.

+//===- SupportModule.cpp - Support API pybind module ----------------------===//+//+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.+// See https://llvm.org/LICENSE.txt for license information.+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception+//+//===----------------------------------------------------------------------===//++#include "SupportModule.h"++#include "circt/Support/BackedgeBuilder.h"+#include "circt/Support/LLVM.h"++#include "mlir-c/IR.h"+#include "mlir/CAPI/IR.h"+#include "mlir/IR/Builders.h"+#include "mlir/IR/Dialect.h"++#include "PybindUtils.h"+#include "pybind11/pybind11.h"+namespace py = pybind11;++using namespace circt;++//===----------------------------------------------------------------------===//+// Classes that translate from something Pybind11 understands to MLIR C++.+//===----------------------------------------------------------------------===//++namespace {++class PyBackedge {+public:+  PyBackedge(Backedge backedge) : backedge(backedge) {}++  MlirValue value() { return wrap(backedge); }++  void setValue(MlirValue newValue) { backedge.setValue(unwrap(newValue)); }++private:+  Backedge backedge;

I'm not sure this is "safe". I've run into weird stuff with MLIR IR types when not using the C API, which I've resolved by storing the MLIR C type instead of the C++ one. This member stores a MlirValue, so you might see some weirdness here.

I also don't think that using the C++ backedge builder adds much value but it does add a fair amount of complexity (and potential for breakage which we don't really understand)... It should be relatively simple to implement this functionality in pure Python and not require any upstream changes, right? I've also thought about doing exactly this in this way, but now that I see it...

mikeurbach

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Pull request review commentllvm/circt

[FIRRTL] Fix `is invalid` on duplex types and bundles

 struct FIRStmtParser : public FIRScopedParser {   /// a passive-typed value and return that.   Value convertToPassive(Value input, Location loc); +  /// Attach invalid values to every element of the value.+  void emitInvalidate(Value val, Location loc, bool isDuplex) {+    // Invalidate doesn't match the semantics of connect or partial connect, and+    // so we have to manually do something like expand-connects. Invalid value+    // needs to be connected to every field of a bundle which is flip, or+    // every field in a duplex operation.+    auto invalidType = val.getType().cast<FIRRTLType>();+    if (invalidType.isa<AnalogType>()) {+      // Analog types must be 'attach'ed, not connected.+      auto invalidVal =+          builder.create<InvalidValuePrimOp>(loc, invalidType.getPassiveType());+      builder.create<AttachOp>(loc, ValueRange{val, invalidVal});+    } else if (auto bundleType = invalidType.dyn_cast<BundleType>()) {+      // We need to recurse into bundle types without an outer flip.  They could+      // have inner flips or analog types.+      for (auto element : bundleType.getElements()) {+        auto elementVal = builder.create<SubfieldOp>(loc, val, element.name);+        emitInvalidate(elementVal, loc, isDuplex);+      }+    } else if (invalidType.isa<FlipType>() || isDuplex) {

Yeah, the idea is that this will create a bundle of invalids and this gets handled in lower-types. There is this test case for it:

    output out1 : { a : UInt<1>, b : UInt<1> }
    ; CHECK: [[INV:%.+]] = firrtl.invalidvalue
    ; CHECK: firrtl.connect %out1, [[INV]]
    out1 is invalid
youngar

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Mike Urbach

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Make Backedge use an early increment range when updating Values.

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Mike Urbach

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Add Python module for Support library, including backedge helpers.

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Mike Urbach

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Add casting to/from MlirValue in Python. Needs upstream patch.

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Mike Urbach

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Update tests to make building cycles a success case.

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Mike Urbach

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Rework InstanceBuilder to use BackedgeBuilder.

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pull request commentllvm/circt

[RTL][Python] Add InstanceBuilder for constructing instances.

I made some good progress with the backedge approach...

About to push a bunch of WIP that should be split out into separate changes. Notably, to make this work in a neat way, we need something similar to https://reviews.llvm.org/D99927, but for Values instead of Operations. I've prototyped this and will be submitting a patch upstream. If it's blocking, I can push the patch to the CIRCT fork of LLVM.

With all that, we are super close, and building cycles works well. The only issue I'm trying to figure out is how to nicely capture the scenario where a backedge never got updated. Right now that just asserts, but it should be a nice Python error.

mikeurbach

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Pull request review commentllvm/circt

[FIRRTL] Fix `is invalid` on duplex types and bundles

 struct FIRStmtParser : public FIRScopedParser {   /// a passive-typed value and return that.   Value convertToPassive(Value input, Location loc); +  /// Attach invalid values to every element of the value.+  void emitInvalidate(Value val, Location loc, bool isDuplex) {+    // Invalidate doesn't match the semantics of connect or partial connect, and+    // so we have to manually do something like expand-connects. Invalid value+    // needs to be connected to every field of a bundle which is flip, or+    // every field in a duplex operation.+    auto invalidType = val.getType().cast<FIRRTLType>();+    if (invalidType.isa<AnalogType>()) {+      // Analog types must be 'attach'ed, not connected.+      auto invalidVal =+          builder.create<InvalidValuePrimOp>(loc, invalidType.getPassiveType());+      builder.create<AttachOp>(loc, ValueRange{val, invalidVal});

I guess this is what the old code was doing, but I think analog can just be dropped. The SFC's RemoveValidIf pass is doing this currently.

youngar

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Pull request review commentllvm/circt

[FIRRTL] Fix `is invalid` on duplex types and bundles

 struct FIRStmtParser : public FIRScopedParser {   /// a passive-typed value and return that.   Value convertToPassive(Value input, Location loc); +  /// Attach invalid values to every element of the value.+  void emitInvalidate(Value val, Location loc, bool isDuplex) {+    // Invalidate doesn't match the semantics of connect or partial connect, and+    // so we have to manually do something like expand-connects. Invalid value+    // needs to be connected to every field of a bundle which is flip, or+    // every field in a duplex operation.+    auto invalidType = val.getType().cast<FIRRTLType>();+    if (invalidType.isa<AnalogType>()) {+      // Analog types must be 'attach'ed, not connected.+      auto invalidVal =+          builder.create<InvalidValuePrimOp>(loc, invalidType.getPassiveType());+      builder.create<AttachOp>(loc, ValueRange{val, invalidVal});+    } else if (auto bundleType = invalidType.dyn_cast<BundleType>()) {+      // We need to recurse into bundle types without an outer flip.  They could+      // have inner flips or analog types.+      for (auto element : bundleType.getElements()) {+        auto elementVal = builder.create<SubfieldOp>(loc, val, element.name);+        emitInvalidate(elementVal, loc, isDuplex);+      }+    } else if (invalidType.isa<FlipType>() || isDuplex) {

Will this handle flip<bundle<...>> correctly? I think that formulation is possible if the internal bundle is passive. Or is the idea that this will then get picked up by lower types properly?

youngar

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Pull request review commentllvm/circt

[FIRRTL] Fix `is invalid` on duplex types and bundles

 struct FIRStmtParser : public FIRScopedParser {   /// a passive-typed value and return that.   Value convertToPassive(Value input, Location loc); +  /// Attach invalid values to every element of the value.+  void emitInvalidate(Value val, Location loc, bool isDuplex) {+    // Invalidate doesn't match the semantics of connect or partial connect, and+    // so we have to manually do something like expand-connects. Invalid value+    // needs to be connected to every field of a bundle which is flip, or+    // every field in a duplex operation.+    auto invalidType = val.getType().cast<FIRRTLType>();+    if (invalidType.isa<AnalogType>()) {+      // Analog types must be 'attach'ed, not connected.+      auto invalidVal =+          builder.create<InvalidValuePrimOp>(loc, invalidType.getPassiveType());+      builder.create<AttachOp>(loc, ValueRange{val, invalidVal});+    } else if (auto bundleType = invalidType.dyn_cast<BundleType>()) {+      // We need to recurse into bundle types without an outer flip.  They could+      // have inner flips or analog types.+      for (auto element : bundleType.getElements()) {+        auto elementVal = builder.create<SubfieldOp>(loc, val, element.name);+        emitInvalidate(elementVal, loc, isDuplex);+      }+    } else if (invalidType.isa<FlipType>() || isDuplex) {+      // If there is an outer flip type, or it is a duplex type, we can emit+      // an invalid connect. This might be a bulk connect to a bundle.+      auto invalidVal =+          builder.create<InvalidValuePrimOp>(loc, invalidType.getPassiveType());+      builder.create<ConnectOp>(loc, val, invalidVal);

Nit: invalidVal can be inlined here.

youngar

comment created time in 6 hours

Pull request review commentllvm/circt

[FIRRTL] Fix `is invalid` on duplex types and bundles

 struct FIRStmtParser : public FIRScopedParser {   /// a passive-typed value and return that.   Value convertToPassive(Value input, Location loc); +  /// Attach invalid values to every element of the value.+  void emitInvalidate(Value val, Location loc, bool isDuplex) {+    // Invalidate doesn't match the semantics of connect or partial connect, and+    // so we have to manually do something like expand-connects. Invalid value+    // needs to be connected to every field of a bundle which is flip, or+    // every field in a duplex operation.+    auto invalidType = val.getType().cast<FIRRTLType>();+    if (invalidType.isa<AnalogType>()) {+      // Analog types must be 'attach'ed, not connected.+      auto invalidVal =+          builder.create<InvalidValuePrimOp>(loc, invalidType.getPassiveType());+      builder.create<AttachOp>(loc, ValueRange{val, invalidVal});+    } else if (auto bundleType = invalidType.dyn_cast<BundleType>()) {+      // We need to recurse into bundle types without an outer flip.  They could+      // have inner flips or analog types.+      for (auto element : bundleType.getElements()) {+        auto elementVal = builder.create<SubfieldOp>(loc, val, element.name);+        emitInvalidate(elementVal, loc, isDuplex);

Nit: elementVal can be inlined.

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PR opened llvm/circt

[FIRRTL] Fix `is invalid` on duplex types and bundles

When attached to bundle values, is invalid recurses through the bundle and connects invalid to any flipped field. When the bundle value is a register or wire, it should connect invalid to every field, regardless of the flippedness of that field. Invalid was not properly recursing or handling wire types, and this change fixes that.

Due to the way is invalid treats wires differently than other values, we cannot simply bulk connect a bundle typed invalid, and let expand connects handle this later.

+117 -19

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PR opened llvm/circt

Remove Type Canonicalization

This is very work-in-progress. This touches almost everything, so expect this to be broken for a while.

This removes type canonicalization due to issues identified in #919 related to the inability of type canonicalization to fully represent FIRRTL semantics around bulk connects and partial connects. I think that flip can continue to be used to represent input/output without issues.

Roughly this will do a number of things:

  1. Remove type canonicalization.
  2. Change the bundles used for memory ports.
  3. Strip flips from SubfieldOp.
  4. Add utilities for computing flow.
  5. Switch to flow-based verification of ConnectOp.
  6. Disallow outer flips on wires.
  7. Switch to flow-based connect lowering in LowerTypes.
  8. Fix all the tests that this will break. 😬
  9. Fix all dependent dialects. 😬

I am trying to keep this patch series extremely well organized so that smaller pieces can be pulled out and landed as needed.

+193 -172

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Schuyler Eldridge

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[FIRRTL] Add SubfieldOp::isFieldFlipped Utility Add a utility that returns true if the field of a subfield is flipped. Because the type of a subfield now strips the flip (to align with the Scala FIRRTL Compiler implementation), this utility is useful when you need to know the flip, e.g., when computing flow. Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>

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[FIRRTL] Add basic utilities for Flow Adds basic utilities for working with FIRRTL flow. A firrtl::Flow enum is added as well as a foldFlow function that will compute the flow of a Value. Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>

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[FIRRTL] Use Flow-based ConnectOp Verification Change ConnectOp verification to rely on Flow computation. Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>

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