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intel/acat 3137

Assistive Context-Aware Toolkit (ACAT)

intel/appframework 2455

The definitive HTML5 mobile javascript framework

intel/ad-rss-lib 211

Library implementing the Responsibility Sensitive Safety model (RSS) for Autonomous Vehicles

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Plugins for jqMobi

issue commentintel/media-driver

Missing the VA_SURFACE_ATTRIB_MEM_TYPE_DRM_PRIME_2 in vaQuerySurfaceAttributes from Gen9~Gen11

@XinfengZhang any update on this?

HeJunyan

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Shoaib Meenai

commit sha ba94b8bdffb4c65d5475746a6ba43d279683e5bd

[clangd] Attempt to fix buildbots http://45.33.8.238/win/47615/step_4.txt is a sample error; I believe it just needs the right header to be included.

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Jake Egan

commit sha 1ff1bcab970afaef49e2ab8ab7681a12d11ad17d

[AIX][ZOS] Disable tests due to lack of Objective-C support AIX and z/OS lack Objective-C support, so mark these tests as unsupported for AIX and z/OS. This patch follows the same reasoning as D109060. Reviewed By: jsji Differential Revision: https://reviews.llvm.org/D112390

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Jonas Devlieghere

commit sha b1bb1d4c46889c4cae2b6586b50c3397584fa064

[lldb] Skip tests for target var without a proc on both arm64 & arm64e LLDB needs to be taught about chained fixups. <rdar://problem/37773624>

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Jyun-Yan You

commit sha de44af4c1db3c333d64ef7beeabd6b38193c024e

[TableGen] Fix codgen of InstrMapping with multiple columns and values This patch fixes invalid syntax of generated code for InstrMapping that has multiple columns and values. Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D111962

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Mikko Ylinen

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latest html output

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issue commentintel/media-driver

Crash in 19.4.1 on Ubuntu 18.04.5 (kernel 5.4.0-52)

(Didn't realize that you already made the commit.) I just run the test program. It's working so far. I'll keep running it and let you know if something bad happens again..

chao-camect

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Eric Adams

commit sha 65b8a32383528954625f80ef31b1edeee46befb6

openssl-qat-engine: Update QAT driver and engine versions This updates the QAT driver to the latest, QAT engine to the latest, IPSEC MB to the latest, and IPP CRYPTO to the latest. A basic test was done in a Kata container and openssl was able to find the qat-hw engine. I don't have a way to test if qat-sw works as the configure parameters have changed. Signed-off-by: Eric Adams <eric.adams@intel.com>

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Mikko Ylinen

commit sha feef1ee2cfe153d638239415e253392c46190cc8

Merge pull request #735 from eadamsintel/update-openssl-dockerfile openssl-qat-engine: Update QAT driver and engine versions

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PR merged intel/intel-device-plugins-for-kubernetes

Reviewers
openssl-qat-engine: Update QAT driver and engine versions

This updates the QAT driver to the latest, QAT engine to the latest, IPSEC MB to the latest, and IPP CRYPTO to the latest. A basic test was done in a Kata container and openssl was able to find the qat-hw engine. I don't have a way to test if qat-sw works as the configure parameters have changed.

Signed-off-by: Eric Adams eric.adams@intel.com

+16 -17

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issue commentintel/neural-compressor

[BUG] Issue found when tuning ssd_mobilenet_V1

Hi @DrXuQian , Thanks for raising this ticket and we've made a local fixing for it.

Before you get the official release, you may update the yaml configuration with below changes. Please copy below code and overwirte model_wise part.

  model_wise:                                        # optional. tuning constraints on model-wise for advance user to reduce tuning space.
    activation:
      algorithm: minmax
    weight:
      algorithm: minmax
  op_wise: {
        '.*concat': {
            'activation':  {'dtype': ['fp32']},
        }
      }
DrXuQian

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ZefuLI

commit sha e766f607f3db329b4b64fe4c4f6321c372e332be

[Decode] Refactoring codechalHW & mediaInterface for softlet build 1. New codechalHWNext and mhwInterfacesNext classes are created for softlet 2. This change is only switching to new avp interface for av1 decode

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issue openedintel/llvm

[CUDA] CTS multi_ptr tests are failed to build due to ptxas fatal: Unresolved extern function '_Z20__spirv_ocl_prefetchPU3AS1Kcy'

Describe the bug CTS multi_ptr tests are failed to build due to ptxas fatal: Unresolved extern function '_Z20__spirv_ocl_prefetchPU3AS1Kcy' with CUDA backend on Windows.

To Reproduce

  1. Get SYCL with CUDA support (GSG) and [SYCL-CTS](https://github.com/KhronosGroup/SYCL-CTS https://github.com/KhronosGroup/SYCL-CTS/commit/14fac446f4454d4889a6b0e7bf5eab83bbe4cf26)
  2. Build CTS tests
cd SYCL-CTS
mkdir build && cd build
cmake -GNinja  -DSYCL_IMPLEMENTATION=Intel_SYCL -DINTEL_SYCL_ROOT=<path to built sycl> -Dopencl_platform_name=nvidia -Dopencl_device_name=opencl_gpu -DCMAKE_BUILD_TYPE=Release -DCMAKE_CXX_FLAGS_RELEASE="-fsycl -fsycl-unnamed-lambda /EHsc /EHsc /MD -Wno-deprecated-declarations" -DINTEL_SYCL_FLAGS="-Xsycl-target-backend;--cuda-gpu-arch=sm_50" -DCMAKE_EXE_LINKER_FLAGS=" -Wl,-no-relax " -DINTEL_SYCL_TRIPLE=nvptx64-nvidia-cuda-sycldevice -DSYCL_CTS_ENABLE_OPENCL_INTEROP_TESTS=Off -DSYCL_CTS_ENABLE_DOUBLE_TESTS=On -DSYCL_CTS_ENABLE_HALF_TESTS=On ..
ninja test_multi_ptr

Error message:

ptxas fatal   : Unresolved extern function '_Z20__spirv_ocl_prefetchPU3AS1Kcy'
llvm-foreach:
Assertion failed: !KeyInfoT::isEqual(Val, EmptyKey) && !KeyInfoT::isEqual(Val, TombstoneKey) && "Empty/Tombstone value shouldn't be inserted into map!", file <build path>\llvm\include\llvm/ADT/DenseMap.h, line 624

Environment

  • OS: Windows
  • Target device and vendor: Nvidia GPU
  • DPC++ version: https://github.com/intel/llvm.git c623223a78e0d1b8bc8bdba6cd7fd4ddf960cb3e
  • CUDA version:
Cuda compilation tools, release 11.4, V11.4.120
Build cuda_11.4.r11.4/compiler.30300941_0

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issue commentintel/llvm

[CUDA] CTS usm tests are failed for CL_INVALID_KERNEL_NAME on Windows

For the Windows testing+CUDA backend, due to the issue in https://github.com/intel/llvm/issues/4764, CUDA installation can only be found in C drive when clang-cl is used. Therefore, before https://github.com/intel/llvm/issues/4764 is fixed, need to run the testing on C drive.

yuxianch

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sys_oak

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CVE quilt release for 211025T092110Z

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Ma Xinjian

commit sha 472e7898bcb94dd561246022cfd5f965e9e04912

lib/runtime_loop.sh: print total operations also Signed-off-by: Ma Xinjian <xinjianx.ma@intel.com> Signed-off-by: Philip Li <philip.li@intel.com>

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V,Anilkumar

commit sha 2c74f1cea5b7a31c20628ebd1f31ad03857c0fa0

USB un-plug event not triggered for DWC3 devices DWC3_DEVTEN_ULSTCNGEN flag which is a link status change flag is only set when the hardware version is lower than DWC3_REVISION_250A. Apparently, the XDCI hardware revision on APL is DWC3_REVISION_260A (0x5533260a) which is greater than DWC3_REVISION_250A (0x5533250a). changed the XDCI values with respect to the APL hw. Tracked-On: OAM-99674 Signed-off-by: V,Anilkumar <anilkumar.v@intel.com>

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John Andersen

commit sha a2edab49c4f784e4e0eabeac3538c53c8b384675

docs: Tue Oct 26 03:31:51 UTC 2021 Signed-off-by: John Andersen <johnandersenpdx@gmail.com>

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Yong

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Edit and review.

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issue openedintel/llvm

[CUDA] CTS usm tests are failed for CL_INVALID_KERNEL_NAME on Windows

Describe the bug CTS usm tests are failed for CL_INVALID_KERNEL_NAME with CUDA backend on Windows. Affected tests:

usm_aligned_alloc
usm_aligned_alloc_host
usm_aligned_alloc_shared
usm_allocator_api
usm_allocator_api_aligned
usm_malloc
usm_malloc_host
usm_malloc_shared

To Reproduce

  1. Get SYCL with CUDA support (GSG) and [SYCL-CTS](https://github.com/KhronosGroup/SYCL-CTS https://github.com/KhronosGroup/SYCL-CTS/commit/14fac446f4454d4889a6b0e7bf5eab83bbe4cf26)
  2. Build CTS tests
cd SYCL-CTS
mkdir build && cd build
cmake -GNinja  -DSYCL_IMPLEMENTATION=Intel_SYCL -DINTEL_SYCL_ROOT=<path to built sycl> -Dopencl_platform_name=nvidia -Dopencl_device_name=opencl_gpu -DCMAKE_BUILD_TYPE=Release -DCMAKE_CXX_FLAGS_RELEASE="-fsycl -fsycl-unnamed-lambda  /EHsc /EHsc /MD -Wno-deprecated-declarations" -DINTEL_SYCL_FLAGS="-Xsycl-target-backend;--cuda-gpu-arch=sm_50" -DCMAKE_EXE_LINKER_FLAGS=" -Wl,-no-relax " -DINTEL_SYCL_TRIPLE=nvptx64-nvidia-cuda-sycldevice -DSYCL_CTS_ENABLE_OPENCL_INTEROP_TESTS=Off -DSYCL_CTS_ENABLE_DOUBLE_TESTS=On -DSYCL_CTS_ENABLE_HALF_TESTS=On ..
ninja test_usm_malloc_shared
  1. Run test
export SYCL_DEVICE_FILTER="cuda:gpu:0"
export SYCL_ENABLE_HOST_DEVICE="1"
./bin/test_device_selector -p nvidia -d opencl_gpu  --test usm_malloc_shared

Error message:

  . sycl exception caught
  . what - No kernel named _ZTSN17usm_allocate_free15usm_kernel_nameIiNS_7case_idINS_13usm_operationILNS_11usm_op_nameE3ELNS_11usm_op_formE0EEELi1ELN2cl4sycl3usm5allocE2ENS_13non_templatedEEELN14usm_alloc_help15memb_func_indexE0EEE was found -46 (CL_INVALID_KERNEL_NAME)
  . line: 427
  . a SYCL exception was caught: No kernel named _ZTSN17usm_allocate_free15usm_kernel_nameIiNS_7case_idINS_13usm_operationILNS_11usm_op_nameE3ELNS_11usm_op_formE0EEELi1ELN2cl4sycl3usm5allocE2ENS_13non_templatedEEELN14usm_alloc_help15memb_func_indexE0EEE was found -46 (CL_INVALID_KERNEL_NAME)
  - fail

  . Passed 0/13 tests (0%)

Environment

  • OS: Windows
  • Target device and vendor: Nvidia GPU
  • DPC++ version: https://github.com/intel/llvm.git c623223a78e0d1b8bc8bdba6cd7fd4ddf960cb3e
  • CUDA version:
Cuda compilation tools, release 11.4, V11.4.120
Build cuda_11.4.r11.4/compiler.30300941_0

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Sergey Dmitriev

commit sha 8d98508a6e941a62d05cd6423dfdec610bdc9ca0

[SYCL][ESIMD] More updates to print performance data in uniform way (#528) * [SYCL][ESIMD] More updates to print performance data in uniform way This patch changes stencil, linear, mandelbrot, BitonicSort and Prefix_local_sum tests to print performance data the same way as it was done in PR#524 for histogram tests. Signed-off-by: Sergey Dmitriev <serguei.n.dmitriev@intel.com>

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PR merged intel/llvm-test-suite

Reviewers
[SYCL][ESIMD] More updates to print performance data in uniform way

This patch changes stencil, linear, mandelbrot, BitonicSort and Prefix_local_sum tests to print performance data the same way as it was done in PR#524 for histogram tests.

Signed-off-by: Sergey Dmitriev serguei.n.dmitriev@intel.com

+647 -412

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10 changed files

sndmitriev

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ftian1

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Tian, Feng

commit sha 1bddfcb5609c8f4643a33b5d7f359138090464ee

Redraw infrastructure and quantization working flow figures.

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Pull request review commentintel/libva

Add LPLA interfaces for HEVC

 typedef struct _VAEncSequenceParameterBufferHEVC {         } bits;         uint32_t value;     } scc_fields;-    /** \brief Reserved bytes for future use, must be zero */-    uint32_t   va_reserved[VA_PADDING_MEDIUM - 1];++    /**+     * \brief Number of frames to lookahead.+     *+     * Default is 0 which means lookahead disabled, Applicable for LookAhead analysis phase.+     * Valid only when \c lookahead_analysis_support == 1.+     * value range: [0..100].+     */+    uint8_t     lookahead_depth;+    /** \brief Minimal IDR distances used for adaptive GOP decision.

interesting, adaptive GOP size could be set during analysis phase, but no any hint reported against it, why?

Xuhenry1

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Pull request review commentintel/libva

Add LPLA interfaces for HEVC

 typedef struct _VAEncSequenceParameterBufferHEVC {         } bits;         uint32_t value;     } scc_fields;-    /** \brief Reserved bytes for future use, must be zero */-    uint32_t   va_reserved[VA_PADDING_MEDIUM - 1];++    /**+     * \brief Number of frames to lookahead.+     *+     * Default is 0 which means lookahead disabled, Applicable for LookAhead analysis phase.+     * Valid only when \c lookahead_analysis_support == 1.+     * value range: [0..100].+     */+    uint8_t     lookahead_depth;+    /** \brief Minimal IDR distances used for adaptive GOP decision.+     *  Applicable for LookAhead analysis phase, valid only when \c lookahead_phase == 1.+     */+    uint8_t     min_adaptive_gop_pic_size;+    /** \brief Maximal IDR distances used for adaptive GOP decision.+     *  Applicable for LookAhead analysis phase, valid only when \c lookahead_phase == 1.+     */+    uint16_t    max_adaptive_gop_pic_size;++    /**+     * \brief Value conveyed to the look ahead analysis phase about the encoding structure+     *  setting of the full encoding pass. Valid only when lookahead_phase == 1, Otherwise+     *  its value should be set to 0 and ignored by driver.+     */+    union {+        struct {+            /**+             * \brief Equal 1 indicates the GOP structure is a closed GOP. Equal 0 indicates+             * it is an open GOP. Default value is 0.+             * Closed GOP means frame in one GOP has no refs to other GOP. on the contrary,+             * Open GOP means some frames in one GOP have refs to other GOP.+             */+            uint8_t    closed_gop   : 1;+            /**+             * \brief Equal 1 indicates the encoder must strictly follow the given GOP structure+             * as defined by parameter \c intra_period, \c ip_period etc. Otherwise, the encoder can+             * adapt the GOP structure for better efficiency, whose range is constrained by+             * parameter \c intra_period and \c ip_period etc.+             */+            uint8_t    strict_gop   : 1;+            /**+             * \brief Equal 1 indicates the GOP/mini GOP structures are subjected to change+             * in the sequence. Equal 0 indicates that the the GOP/mini GOP structures are fixed+             * in the sequence. Default value is 0。

both gop and mini gop?

Xuhenry1

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Pull request review commentintel/libva

Add LPLA interfaces for HEVC

 VAStatus vaBufferSetNumElements(  */ #define VA_CODED_BUF_STATUS_SINGLE_NALU                 0x10000000 +/**+ * \brief Look Ahead Info.+ * + * When lookahead_phase equals 1, the information in this data structure+ * describes the suggestions of encoding parameters for full encode pass+ * about a frame already encoded in the look ahead pass.+ * + * Look ahead BRC consists of two phases: analysis phase, and full encoding phase.+ * The relationship between the look ahead pass and full encode pass is illustrated+ * by an example below:+ *                 |-lookahead_depth-|+ * Look ahead pass : 0    1    2    3    4    5 + *                    \___ \___ \___ \___ \___ \___+ *                        \    \    \    \    \    \+ *                         \___ \___ \___ \___ \___ \___+ *                             \    \    \    \    \    \+ *                              \__  \__  \__  \__  \__  \__+ *                                 \    \    \    \    \    \+ * Full encode pass:                 0    1    2    3    4    5+ * + * The sequence contains 6 frames and lookahead_depth set to 4.+ * In look ahead pass, the returned \ref VALookAheadInfo.encode_hints.valid_info are all+ * 0 for frames 0, 1, 2, and frame 3 reports VALookAheadInfo.encode_hints.valid_info = 1.+ * In full encode pass, it will start to encode frame 0 according to the suggestions of+ * encoding parameters(VALookAheadInfo) returned from look ahead pass at frame 3, encode+ * frame 1 according to the suggestions of encoding parameters(VALookAheadInfo) returned+ * from look ahead pass at frame 4, and so on for later frames.+ *+ */+typedef struct _VALookAheadInfo+{+    union {+        struct {+            /**+             * \brief This flag indicates Look Ahead suggestions are valid for full encode pass.+             *+             * 1 if valid, Otherwise, all other info should be set to 0 and ignored by app.+             */+            uint32_t valid_info   : 1;+            /**+             * \brief Value indicates suggestion whether or not to apply Custom Quantization Matrix.+             *+             * 0x00 - flat matrix+             * 0x01 - weak customized matrix+             * 0x02 - medium customized matrix+             * 0x03 - strong customized matrix+             * 0x04 - extreme customized matrix+             * 0xFF - invalid hint;+             * other values are reserved.+             * +             * flat/weak/medium/strong/extreme mean different step size level for custom quantization matrix.+             * Flat matrix means all coefficients use the same scaling value.+             * Extreme customized matrix indicates matrix with smallest step size for low freq coefficients.+             * App may decide how to set quantization matrix based on this suggestion.+             */+            uint32_t cqm_hint     : 8;+            /**+             * \brief A flag indicates suggestion whether the frame should be coded as Intra.+             *+             * 1 if frame suggested to be coded as intra, 0 if suggested to be coded as inter.+             */+            uint32_t intra_hint   : 1;+            /**+             * \brief Value indicates suggestion of mini GOP.+             *+             * Default value 0 indicates no suggestion of mini GOP size is available.+             * Value range: [0, 1, 2, 4, 8, 16].+             */+            uint32_t mini_gop_size : 8;+            /** \brief Reserved bytes for future use, must be zero. */+            uint32_t reserved     : 12;+        } bits;+        uint32_t value;+    } encode_hints;++    /**+     * \brief Value indicates suggestion of target frame size for the full encode process.+     * +     * Set target_frame_size in PPS when this suggested value is used by app.+     */+    uint32_t target_frame_size;

still 0 means invalid?

Xuhenry1

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Pull request review commentintel/libva

Add LPLA interfaces for HEVC

 typedef struct _VAEncSequenceParameterBufferHEVC {               * application would enable Qp Modulation               */             uint32_t    hierachical_flag                               : 1;+            /** \brief Indicates whether or not the encoding is in the Look Ahead pass.+             *  if \c lookahead_analysis_support in #VAConfigAttribValLookAhead is on+             *  and \c lookahead_depth > 0, this flag on indicates the current encoding is+             *  in the Look Ahead analysis phase, and CQP should be applied,

only CQP mode? is it a restriction of media driver or logic , interfaces should represent the logic or spec.

Xuhenry1

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