apple/swift 54871
The Swift Programming Language
apple/swift-evolution 11802
This maintains proposals for changes and user-visible enhancements to the Swift Programming Language.
apple/swift-package-manager 8136
The Package Manager for the Swift Programming Language
apple/swift-corelibs-foundation 4107
The Foundation Project, providing core utilities, internationalization, and OS independence
apple/swift-corelibs-libdispatch 1962
The libdispatch Project, (a.k.a. Grand Central Dispatch), for concurrency on multicore hardware
apple/swift-corelibs-xctest 872
The XCTest Project, A Swift core library for providing unit test support
A low-level build system, used by Xcode and the Swift Package Manager
apple/swift-llvm 802
apple/swift-lldb 646
This is the version of LLDB that supports the Swift programming language & REPL.
pull request commentllvm/mlir-npcomp
Enable building using LLVM_EXTERNAL_PROJECTS.
Not that I can think of, but if it is not too inconvenient, could you land (or have one of us land) at a time during US working hours and post a note to #mlir-npcomp to have one of us try it? I'm happy to hit the merge button if not convenient for you.
On Mon, Jan 25, 2021 at 8:46 PM mikeurbach notifications@github.com wrote:
Sounds good to me. Other than the GitHub checks and using external builds locally, is there anything else I can test before I land these changes?
— You are receiving this because you were mentioned. Reply to this email directly, view it on GitHub https://github.com/llvm/mlir-npcomp/pull/152#issuecomment-767293296, or unsubscribe https://github.com/notifications/unsubscribe-auth/AADYVACKTZFG6MS635YNUCTS3ZCKLANCNFSM4WSZVQ3A .
comment created time in 3 minutes
push eventllvm/circt
commit sha e9acb3f54a4c7c43aecaecc21d7f1cc317384e39
[FIRRTL] Fix LowerTypes getAllBundleLowerings for nested aggregates. (#510) Previously, this would only work for bundles with a single level of nesting. This update calls the flattenBundleTypes helper, which allows this function to work with bundles of arbitrary nesting. This fixes https://github.com/llvm/circt/issues/507.
commit sha b89566a2951271380ca225b716ac83acfecada19
[FIRRTL] Return multiple results from memories Change FIRRTL Dialect's MemOp to return one result per port as opposed to a single result bundle containing each port as a subelement. Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>
commit sha 621e2f644c17767a55946361785825a3d5ed6bb1
[FIRRTL] Lower MemOp during LowerTypes pass Add memory lowering during FIRRTL type lowering. The leaf types of a memory are broken out into separate memories. Signed-off-by: Schuyler Eldridge <schuyler.eldridge@sifive.com>
push time in 13 minutes
issue commentllvm/circt
[FIRRTL] Lower Types Fails for Certain Nested Bundles
No problem, that was an oversight on my part.
comment created time in 18 minutes
push eventapple/swift
commit sha 5b64ef81840eb8b6ffd768d412ac442bf5d1c514
Sema: Remove a bit of dead code in DerivedConformanceDifferentiable.cpp
commit sha f55f290a47f3be25f02521aaaeea4dbe258541ad
Merge pull request #35594 from slavapestov/squash-dead-code-warning Sema: Remove a bit of dead code in DerivedConformanceDifferentiable.cpp
commit sha aa4df86c7cc8fa77ea5b50312e09f4e00d0d5de2
Merge remote-tracking branch 'origin/main' into rebranch
push time in 24 minutes
push eventapple/swift
commit sha 5b64ef81840eb8b6ffd768d412ac442bf5d1c514
Sema: Remove a bit of dead code in DerivedConformanceDifferentiable.cpp
commit sha f55f290a47f3be25f02521aaaeea4dbe258541ad
Merge pull request #35594 from slavapestov/squash-dead-code-warning Sema: Remove a bit of dead code in DerivedConformanceDifferentiable.cpp
push time in 26 minutes
pull request commentapple/swift
Fix SILInstruction::mayRelease to handle unmanaged_release_value.
@swift-ci test
comment created time in 27 minutes
PR opened apple/swift
Apparently this API was never called from any OSSA passes.
Fixes rdar://73507733 ([SR-14090]: [Source Compat] swift-futures 5.1 fails to build from main branch)
pr created time in 27 minutes
pull request commentllvm/mlir-npcomp
Enable building using LLVM_EXTERNAL_PROJECTS.
Sounds good to me. Other than the GitHub checks and using external builds locally, is there anything else I can test before I land these changes?
comment created time in 31 minutes
pull request commentllvm/mlir-npcomp
Enable building using LLVM_EXTERNAL_PROJECTS.
Wow @stellaraccident you reviewed faster than I could request it. I do wonder if there may be some CMake incantation to handle the layering under 'tools' differently. If you are OK with this as-is, I will leave that to future spelunking.
Caught me at an opportune time :)
If it works, let's commit as-is. Incremental CMake work is the name of the game... we can shift things later with smaller changes once we figure out how to do them.
comment created time in 36 minutes
pull request commentllvm/mlir-npcomp
Enable building using LLVM_EXTERNAL_PROJECTS.
Wow @stellaraccident you reviewed faster than I could request it. I do wonder if there may be some CMake incantation to handle the layering under 'tools' differently. If you are OK with this as-is, I will leave that to future spelunking.
comment created time in 39 minutes
Pull request review commentllvm/mlir-npcomp
Enable building using LLVM_EXTERNAL_PROJECTS.
set(LLVM_TARGET_DEFINITIONS Passes.td) mlir_tablegen(Passes.h.inc -gen-pass-decls ${NPCOMP_TABLEGEN_ARGS}) add_public_tablegen_target(NPCOMPConversionPassIncGen) -add_mlir_doc(Passes -gen-pass-doc ConversionPasses ./)+add_mlir_doc(Passes -gen-pass-doc NPCOMPConversionPasses ./)
Thx. Copy-pasta from the beginning of the project.
comment created time in 39 minutes
Pull request review commentllvm/mlir-npcomp
Enable building using LLVM_EXTERNAL_PROJECTS.
import lit.llvm lit.llvm.initialize(lit_config, config) # Let the main config do the real work.-lit_config.load_config(config, "@CMAKE_SOURCE_DIR@/frontends/pytorch/test/lit.cfg.py")+lit_config.load_config(config, "@CMAKE_CURRENT_SOURCE_DIR@/lit.cfg.py")
I'm ok with it if it works. Can't think of anything better without fiddling with it.
comment created time in 40 minutes
Pull request review commentllvm/mlir-npcomp
Enable building using LLVM_EXTERNAL_PROJECTS.
config.npcomp_tools_dir = os.path.join(config.npcomp_obj_root, 'bin') # Tweak the PATH to include the tools dir.+npcomp_python_dir = "python" if config.npcomp_built_standalone else "tools/npcomp/python"
Let's land it in a working state how you have it. Then I/someone can try to find a more targeted place to put it. I'd hope we can just emit all of the python artifacts into the top level build/python
directory: even across projects, they form a namespace that must not overlap, so having everything write to that directory is ok (CMake will complain if two projects then try to write the same thing into the python namespace).
comment created time in 40 minutes
Pull request review commentllvm/mlir-npcomp
Enable building using LLVM_EXTERNAL_PROJECTS.
set(MLIR_NPCOMP_SOURCE_DIR ${CMAKE_CURRENT_SOURCE_DIR}) set(MLIR_NPCOMP_BINARY_DIR ${CMAKE_CURRENT_BINARY_DIR}) add_custom_target(check-npcomp)-add_custom_target(check-all)-add_dependencies(check-all check-npcomp)+add_custom_target(check-npcomp-all)
sgtm
comment created time in 42 minutes
pull request commentapple/swift
[SILGen] Enable alternative entry point name.
@swift-ci please asan test
comment created time in 44 minutes
pull request commentapple/swift
[SILGen] Enable alternative entry point name.
@swift-ci please clean test
comment created time in 44 minutes
push eventllvm/circt
commit sha e9acb3f54a4c7c43aecaecc21d7f1cc317384e39
[FIRRTL] Fix LowerTypes getAllBundleLowerings for nested aggregates. (#510) Previously, this would only work for bundles with a single level of nesting. This update calls the flattenBundleTypes helper, which allows this function to work with bundles of arbitrary nesting. This fixes https://github.com/llvm/circt/issues/507.
push time in an hour
issue closedllvm/circt
[FIRRTL] Lower Types Fails for Certain Nested Bundles
The LowerTypes
pass has problems with nested aggregates. Consider the following example:
circuit Foo :
module Foo :
input a: { b: {c: UInt<1>}}
output b: { b: {c: UInt<1>}}
b <= a
firtool -lower-to-rtl -enable-lower-types -verilog Foo.fir
# Assertion failed: (entry && "bundle lowering was not set"), function getBundleLowering, file ../lib/Dialect/FIRRTL/Transforms/LowerTypes.cpp, line 530.
I believe this is trying to find a lowering for the non-leaf types, but such a lowering was never recorded.
closed time in an hour
seldridgePR merged llvm/circt
Previously, this would only work for bundles with a single level of nesting. This update calls the flattenBundleTypes helper, which allows this function to work with bundles of arbitrary nesting. This fixes https://github.com/llvm/circt/issues/507.
pr closed time in an hour
Pull request review commentllvm/mlir-npcomp
Enable building using LLVM_EXTERNAL_PROJECTS.
set(LLVM_TARGET_DEFINITIONS Passes.td) mlir_tablegen(Passes.h.inc -gen-pass-decls ${NPCOMP_TABLEGEN_ARGS}) add_public_tablegen_target(NPCOMPConversionPassIncGen) -add_mlir_doc(Passes -gen-pass-doc ConversionPasses ./)+add_mlir_doc(Passes -gen-pass-doc NPCOMPConversionPasses ./)
This was conflicting with the MLIR ConversionPasses name.
comment created time in an hour
Pull request review commentllvm/mlir-npcomp
Enable building using LLVM_EXTERNAL_PROJECTS.
import lit.llvm lit.llvm.initialize(lit_config, config) # Let the main config do the real work.-lit_config.load_config(config, "@CMAKE_SOURCE_DIR@/frontends/pytorch/test/lit.cfg.py")+lit_config.load_config(config, "@CMAKE_CURRENT_SOURCE_DIR@/lit.cfg.py")
I think this change is a safe way to make this path agnostic to CMAKE_SOURCE_DIR, which can be different for an external build. It works on my computer and the GitHub check, but please correct me if I'm wrong.
comment created time in an hour
Pull request review commentllvm/mlir-npcomp
Enable building using LLVM_EXTERNAL_PROJECTS.
set(MLIR_NPCOMP_SOURCE_DIR ${CMAKE_CURRENT_SOURCE_DIR}) set(MLIR_NPCOMP_BINARY_DIR ${CMAKE_CURRENT_BINARY_DIR}) add_custom_target(check-npcomp)-add_custom_target(check-all)-add_dependencies(check-all check-npcomp)+add_custom_target(check-npcomp-all)
The check-all
target seemed to conflict with the MLIR one. I added this npcomp
namespacing, but I'm not sure if there is a better way.
comment created time in an hour
Pull request review commentllvm/mlir-npcomp
Enable building using LLVM_EXTERNAL_PROJECTS.
config.npcomp_tools_dir = os.path.join(config.npcomp_obj_root, 'bin') # Tweak the PATH to include the tools dir.+npcomp_python_dir = "python" if config.npcomp_built_standalone else "tools/npcomp/python"
I found that the npcomp
python artifacts were placed under tools/npcomp/python
when doing an external build. A couple things about this: 1) I'm not sure if there is a better way to use CMake to put the python just in build/python
when doing an external build, 2) I think the npcomp
in the tools/npcomp/python
path comes from the name passed to the LLVM_EXTERNAL_PROJECTS
flag, so this may not be guaranteed to match for everyone's setup. I have a feeling there is a better way to achieve this line of python with CMake, but I haven't figured it out yet.
comment created time in an hour
Pull request review commentllvm/mlir-npcomp
Enable building using LLVM_EXTERNAL_PROJECTS.
config.npcomp_tools_dir = os.path.join(config.npcomp_obj_root, 'bin') # Tweak the PATH to include the tools dir.+npcomp_python_dir = "python" if config.npcomp_built_standalone else "tools/npcomp/python"
Side comment (nothing to do about it here): I find this layering of such projects under 'tools' to be really annoying but haven't taken the time to see what would need to be done to pop it up a level.
comment created time in an hour
issue openedllvm/circt
[FIRRTL] _* register name (core dump)
The following FIRRTL program
circuit top_mod :
module top_mod :
input clock: Clock
input reset: UInt<1>
input inp_0: UInt<1>
output tmp1: UInt<1>
reg _tmp2: UInt<1>, clock with: (reset => (reset, UInt<1>(0)))
_tmp2 <= inp_0
tmp1 <= _tmp2
Compiled with firtool --lower-to-rtl
gives an error:
firtool: ../llvm/llvm/include/llvm/ADT/ilist_iterator.h:138: llvm::ilist_iterator<OptionsT, IsReverse, IsConst>::reference llvm::ilist_iterator<OptionsT, IsReverse, IsConst>::operator*() const [with OptionsT = llvm::ilist_detail::node_options<mlir::Block, true, false, void>; bool IsReverse = false; bool IsConst = false; llvm::ilist_iterator<OptionsT, IsReverse, IsConst>::reference = mlir::Block&]: Assertion `!NodePtr->isKnownSentinel()' failed.
PLEASE submit a bug report to https://bugs.llvm.org/ and include the crash backtrace.
Stack dump:
0. Program arguments: ../../llvm/circt/build/bin/firtool a_top_mod.fir --lower-to-rtl --verilog -o=a_top_mod_new.v
#0 0x00000000004c196b llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) /home/drom/work/github/llvm/circt/llvm/llvm/lib/Support/Unix/Signals.inc:565:22
#1 0x00000000004c1a22 PrintStackTraceSignalHandler(void*) /home/drom/work/github/llvm/circt/llvm/llvm/lib/Support/Unix/Signals.inc:632:1
#2 0x00000000004bfa22 llvm::sys::RunSignalHandlers() /home/drom/work/github/llvm/circt/llvm/llvm/lib/Support/Signals.cpp:71:20
#3 0x00000000004c13be SignalHandler(int) /home/drom/work/github/llvm/circt/llvm/llvm/lib/Support/Unix/Signals.inc:407:1
#4 0x00007f28169991d0 __restore_rt (/lib64/libpthread.so.0+0x141d0)
#5 0x00007f2816458ae5 raise (/lib64/libc.so.6+0x3dae5)
#6 0x00007f2816441864 abort (/lib64/libc.so.6+0x26864)
#7 0x00007f2816441749 _nl_load_domain.cold (/lib64/libc.so.6+0x26749)
#8 0x00007f2816451016 (/lib64/libc.so.6+0x36016)
#9 0x000000000040e32d llvm::ilist_iterator<llvm::ilist_detail::node_options<mlir::Block, true, false, void>, false, false>::operator*() const /home/drom/work/github/llvm/circt/build/../llvm/llvm/include/llvm/ADT/ilist_iterator.h:139:33
#10 0x000000000040c8c0 llvm::simple_ilist<mlir::Block>::front() /home/drom/work/github/llvm/circt/build/../llvm/llvm/include/llvm/ADT/simple_ilist.h:138:40
#11 0x000000000040bb0c mlir::Region::front() /home/drom/work/github/llvm/circt/build/../llvm/mlir/include/mlir/IR/Region.h:61:43
#12 0x000000000050e3ac circt::sv::AlwaysFFOp::getResetBlock() /home/drom/work/github/llvm/circt/build/include/circt/Dialect/SV/SV.h.inc:243:58
#13 0x0000000000502b4f (anonymous namespace)::ModuleEmitter::visitSV(circt::sv::AlwaysFFOp) /home/drom/work/github/llvm/circt/build/../lib/Translation/ExportVerilog/ExportVerilog.cpp:1500:23
#14 0x00000000005095f9 mlir::LogicalResult circt::sv::Visitor<(anonymous namespace)::ModuleEmitter, mlir::LogicalResult>::dispatchSVVisitor(mlir::Operation*)::'lambda'(auto)::operator()<circt::sv::AlwaysFFOp>(auto) const /home/drom/work/github/llvm/circt/build/../include/circt/Dialect/SV/SVVisitors.h:43:13
#15 0x0000000000509275 llvm::TypeSwitch<mlir::Operation*, mlir::LogicalResult>& llvm::TypeSwitch<mlir::Operation*, mlir::LogicalResult>::Case<circt::sv::AlwaysFFOp, circt::sv::Visitor<(anonymous namespace)::ModuleEmitter, mlir::LogicalResult>::dispatchSVVisitor(mlir::Operation*)::'lambda'(auto)&>(mlir::LogicalResult&&) /home/drom/work/github/llvm/circt/build/../llvm/llvm/include/llvm/ADT/TypeSwitch.h:116:22
#16 0x0000000000508ed1 llvm::TypeSwitch<mlir::Operation*, mlir::LogicalResult>& llvm::detail::TypeSwitchBase<llvm::TypeSwitch<mlir::Operation*, mlir::LogicalResult>, mlir::Operation*>::Case<circt::sv::AlwaysFFOp, circt::sv::InitialOp, circt::sv::YieldOp, circt::sv::BPAssignOp, circt::sv::PAssignOp, circt::sv::AliasOp, circt::sv::FWriteOp, circt::sv::FatalOp, circt::sv::FinishOp, circt::sv::VerbatimOp, circt::sv::InterfaceOp, circt::sv::InterfaceSignalOp, circt::sv::InterfaceModportOp, circt::sv::InterfaceInstanceOp, circt::sv::GetModportOp, circt::sv::AssignInterfaceSignalOp, circt::sv::ReadInterfaceSignalOp, circt::sv::AssertOp, circt::sv::AssumeOp, circt::sv::CoverOp, circt::sv::Visitor<(anonymous namespace)::ModuleEmitter, mlir::LogicalResult>::dispatchSVVisitor(mlir::Operation*)::'lambda'(auto)&>(circt::sv::Visitor<(anonymous namespace)::ModuleEmitter, mlir::LogicalResult>::dispatchSVVisitor(mlir::Operation*)::'lambda'(auto)&) /home/drom/work/github/llvm/circt/build/../llvm/llvm/include/llvm/ADT/TypeSwitch.h:41:42
#17 0x0000000000508b33 llvm::TypeSwitch<mlir::Operation*, mlir::LogicalResult>& llvm::detail::TypeSwitchBase<llvm::TypeSwitch<mlir::Operation*, mlir::LogicalResult>, mlir::Operation*>::Case<circt::sv::AlwaysOp, circt::sv::AlwaysFFOp, circt::sv::InitialOp, circt::sv::YieldOp, circt::sv::BPAssignOp, circt::sv::PAssignOp, circt::sv::AliasOp, circt::sv::FWriteOp, circt::sv::FatalOp, circt::sv::FinishOp, circt::sv::VerbatimOp, circt::sv::InterfaceOp, circt::sv::InterfaceSignalOp, circt::sv::InterfaceModportOp, circt::sv::InterfaceInstanceOp, circt::sv::GetModportOp, circt::sv::AssignInterfaceSignalOp, circt::sv::ReadInterfaceSignalOp, circt::sv::AssertOp, circt::sv::AssumeOp, circt::sv::CoverOp, circt::sv::Visitor<(anonymous namespace)::ModuleEmitter, mlir::LogicalResult>::dispatchSVVisitor(mlir::Operation*)::'lambda'(auto)&>(circt::sv::Visitor<(anonymous namespace)::ModuleEmitter, mlir::LogicalResult>::dispatchSVVisitor(mlir::Operation*)::'lambda'(auto)&) /home/drom/work/github/llvm/circt/build/../llvm/llvm/include/llvm/ADT/TypeSwitch.h:42:3
#18 0x0000000000508681 llvm::TypeSwitch<mlir::Operation*, mlir::LogicalResult>& llvm::detail::TypeSwitchBase<llvm::TypeSwitch<mlir::Operation*, mlir::LogicalResult>, mlir::Operation*>::Case<circt::sv::IfOp, circt::sv::AlwaysOp, circt::sv::AlwaysFFOp, circt::sv::InitialOp, circt::sv::YieldOp, circt::sv::BPAssignOp, circt::sv::PAssignOp, circt::sv::AliasOp, circt::sv::FWriteOp, circt::sv::FatalOp, circt::sv::FinishOp, circt::sv::VerbatimOp, circt::sv::InterfaceOp, circt::sv::InterfaceSignalOp, circt::sv::InterfaceModportOp, circt::sv::InterfaceInstanceOp, circt::sv::GetModportOp, circt::sv::AssignInterfaceSignalOp, circt::sv::ReadInterfaceSignalOp, circt::sv::AssertOp, circt::sv::AssumeOp, circt::sv::CoverOp, circt::sv::Visitor<(anonymous namespace)::ModuleEmitter, mlir::LogicalResult>::dispatchSVVisitor(mlir::Operation*)::'lambda'(auto)&>(circt::sv::Visitor<(anonymous namespace)::ModuleEmitter, mlir::LogicalResult>::dispatchSVVisitor(mlir::Operation*)::'lambda'(auto)&) /home/drom/work/github/llvm/circt/build/../llvm/llvm/include/llvm/ADT/TypeSwitch.h:42:3
#19 0x0000000000507c67 llvm::TypeSwitch<mlir::Operation*, mlir::LogicalResult>& llvm::detail::TypeSwitchBase<llvm::TypeSwitch<mlir::Operation*, mlir::LogicalResult>, mlir::Operation*>::Case<circt::sv::IfDefOp, circt::sv::IfOp, circt::sv::AlwaysOp, circt::sv::AlwaysFFOp, circt::sv::InitialOp, circt::sv::YieldOp, circt::sv::BPAssignOp, circt::sv::PAssignOp, circt::sv::AliasOp, circt::sv::FWriteOp, circt::sv::FatalOp, circt::sv::FinishOp, circt::sv::VerbatimOp, circt::sv::InterfaceOp, circt::sv::InterfaceSignalOp, circt::sv::InterfaceModportOp, circt::sv::InterfaceInstanceOp, circt::sv::GetModportOp, circt::sv::AssignInterfaceSignalOp, circt::sv::ReadInterfaceSignalOp, circt::sv::AssertOp, circt::sv::AssumeOp, circt::sv::CoverOp, circt::sv::Visitor<(anonymous namespace)::ModuleEmitter, mlir::LogicalResult>::dispatchSVVisitor(mlir::Operation*)::'lambda'(auto)&>(circt::sv::Visitor<(anonymous namespace)::ModuleEmitter, mlir::LogicalResult>::dispatchSVVisitor(mlir::Operation*)::'lambda'(auto)&) /home/drom/work/github/llvm/circt/build/../llvm/llvm/include/llvm/ADT/TypeSwitch.h:42:3
#20 0x00000000005074af llvm::TypeSwitch<mlir::Operation*, mlir::LogicalResult>& llvm::detail::TypeSwitchBase<llvm::TypeSwitch<mlir::Operation*, mlir::LogicalResult>, mlir::Operation*>::Case<circt::sv::RegOp, circt::sv::IfDefOp, circt::sv::IfOp, circt::sv::AlwaysOp, circt::sv::AlwaysFFOp, circt::sv::InitialOp, circt::sv::YieldOp, circt::sv::BPAssignOp, circt::sv::PAssignOp, circt::sv::AliasOp, circt::sv::FWriteOp, circt::sv::FatalOp, circt::sv::FinishOp, circt::sv::VerbatimOp, circt::sv::InterfaceOp, circt::sv::InterfaceSignalOp, circt::sv::InterfaceModportOp, circt::sv::InterfaceInstanceOp, circt::sv::GetModportOp, circt::sv::AssignInterfaceSignalOp, circt::sv::ReadInterfaceSignalOp, circt::sv::AssertOp, circt::sv::AssumeOp, circt::sv::CoverOp, circt::sv::Visitor<(anonymous namespace)::ModuleEmitter, mlir::LogicalResult>::dispatchSVVisitor(mlir::Operation*)::'lambda'(auto)&>(circt::sv::Visitor<(anonymous namespace)::ModuleEmitter, mlir::LogicalResult>::dispatchSVVisitor(mlir::Operation*)::'lambda'(auto)&) /home/drom/work/github/llvm/circt/build/../llvm/llvm/include/llvm/ADT/TypeSwitch.h:42:3
#21 0x0000000000506bab llvm::TypeSwitch<mlir::Operation*, mlir::LogicalResult>& llvm::detail::TypeSwitchBase<llvm::TypeSwitch<mlir::Operation*, mlir::LogicalResult>, mlir::Operation*>::Case<circt::sv::TextualValueOp, circt::sv::RegOp, circt::sv::IfDefOp, circt::sv::IfOp, circt::sv::AlwaysOp, circt::sv::AlwaysFFOp, circt::sv::InitialOp, circt::sv::YieldOp, circt::sv::BPAssignOp, circt::sv::PAssignOp, circt::sv::AliasOp, circt::sv::FWriteOp, circt::sv::FatalOp, circt::sv::FinishOp, circt::sv::VerbatimOp, circt::sv::InterfaceOp, circt::sv::InterfaceSignalOp, circt::sv::InterfaceModportOp, circt::sv::InterfaceInstanceOp, circt::sv::GetModportOp, circt::sv::AssignInterfaceSignalOp, circt::sv::ReadInterfaceSignalOp, circt::sv::AssertOp, circt::sv::AssumeOp, circt::sv::CoverOp, circt::sv::Visitor<(anonymous namespace)::ModuleEmitter, mlir::LogicalResult>::dispatchSVVisitor(mlir::Operation*)::'lambda'(auto)>(circt::sv::Visitor<(anonymous namespace)::ModuleEmitter, mlir::LogicalResult>::dispatchSVVisitor(mlir::Operation*)::'lambda'(auto)&&) /home/drom/work/github/llvm/circt/build/../llvm/llvm/include/llvm/ADT/TypeSwitch.h:42:3
#22 0x00000000005063d0 circt::sv::Visitor<(anonymous namespace)::ModuleEmitter, mlir::LogicalResult>::dispatchSVVisitor(mlir::Operation*) /home/drom/work/github/llvm/circt/build/../include/circt/Dialect/SV/SVVisitors.h:42:52
#23 0x0000000000504cd8 (anonymous namespace)::ModuleEmitter::emitOperation(mlir::Operation*) /home/drom/work/github/llvm/circt/build/../lib/Translation/ExportVerilog/ExportVerilog.cpp:1929:16
#24 0x0000000000505757 (anonymous namespace)::ModuleEmitter::emitRTLModule(circt::rtl::RTLModuleOp) /home/drom/work/github/llvm/circt/build/../lib/Translation/ExportVerilog/ExportVerilog.cpp:2058:40
#25 0x0000000000505908 (anonymous namespace)::MLIRModuleEmitter::emit(mlir::ModuleOp) /home/drom/work/github/llvm/circt/build/../lib/Translation/ExportVerilog/ExportVerilog.cpp:2084:7
#26 0x0000000000505abd circt::exportVerilog(mlir::ModuleOp, llvm::raw_ostream&) /home/drom/work/github/llvm/circt/build/../lib/Translation/ExportVerilog/ExportVerilog.cpp:2097:24
#27 0x00000000004096f0 processBuffer(std::unique_ptr<llvm::MemoryBuffer, std::default_delete<llvm::MemoryBuffer> >, llvm::raw_ostream&) /home/drom/work/github/llvm/circt/build/../tools/firtool/firtool.cpp:153:44
#28 0x0000000000409ac0 main /home/drom/work/github/llvm/circt/build/../tools/firtool/firtool.cpp:195:13
#29 0x00007f2816443152 __libc_start_main (/lib64/libc.so.6+0x28152)
#30 0x00000000004090ee _start /home/abuild/rpmbuild/BUILD/glibc-2.32/csu/../sysdeps/x86_64/start.S:122:0
./process1.sh: line 14: 29799 Aborted (core dumped) ../../llvm/circt/build/bin/firtool a_top_mod.fir --lower-to-rtl --verilog -o=$VFILE2
Compiled with firrtl-1.5.0
produces this Verilog:
module top_mod(
input clock,
input reset,
input inp_0,
output tmp1
);
`ifdef RANDOMIZE_REG_INIT
reg [31:0] _RAND_0;
`endif // RANDOMIZE_REG_INIT
reg _tmp2;
assign tmp1 = _tmp2;
always @(posedge clock) begin
if (reset) begin
_tmp2 <= 1'h0;
end else begin
_tmp2 <= inp_0;
end
end
// Register and memory initialization
`ifdef RANDOMIZE_GARBAGE_ASSIGN
`define RANDOMIZE
`endif
`ifdef RANDOMIZE_INVALID_ASSIGN
`define RANDOMIZE
`endif
`ifdef RANDOMIZE_REG_INIT
`define RANDOMIZE
`endif
`ifdef RANDOMIZE_MEM_INIT
`define RANDOMIZE
`endif
`ifndef RANDOM
`define RANDOM $random
`endif
`ifdef RANDOMIZE_MEM_INIT
integer initvar;
`endif
`ifndef SYNTHESIS
`ifdef FIRRTL_BEFORE_INITIAL
`FIRRTL_BEFORE_INITIAL
`endif
initial begin
`ifdef RANDOMIZE
`ifdef INIT_RANDOM
`INIT_RANDOM
`endif
`ifndef VERILATOR
`ifdef RANDOMIZE_DELAY
#`RANDOMIZE_DELAY begin end
`else
#0.002 begin end
`endif
`endif
`ifdef RANDOMIZE_REG_INIT
_RAND_0 = {1{`RANDOM}};
_tmp2 = _RAND_0[0:0];
`endif // RANDOMIZE_REG_INIT
`endif // RANDOMIZE
end // initial
`ifdef FIRRTL_AFTER_INITIAL
`FIRRTL_AFTER_INITIAL
`endif
`endif // SYNTHESIS
endmodule
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PR opened llvm/mlir-npcomp
This allows building NPCOMP as an external project of LLVM, similar to how CIRCT can be built: https://github.com/llvm/circt/pull/227.
The CMake options to use this build style look like this:
-DLLVM_EXTERNAL_PROJECTS=npcomp \
-DLLVM_EXTERNAL_NPCOMP_SOURCE_DIR=/path/to/mlir-npcomp \
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push eventapple/swift
commit sha 4f740a4784586484bf16fc69c1d742daa71520f6
Concurrency: support draining the main queue in single threaded mode When built in single threaded mode, the runtime does not use dispatch to queue the tasks. As a result, pumping the dispatch main queue will simply wait indefinitely. In the single threaded mode, simply halt execution and drain all pending tasks before returning. This allows forward progress in the single threaded mode.
commit sha 62f90501580f2aede9260b93c4bb41d0ffa08955
Merge pull request #35584 from compnerd/single-threaded-drain Concurrency: support draining the main queue in single threaded mode
commit sha 321b08a64fb40dea589170c03098c829a60cba4d
Merge remote-tracking branch 'origin/main' into rebranch
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pull request commentapple/swift
Concurrency: avoid `CFRunLoopRun` on non-Darwin
@swift-ci please test macOS platform
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