profile
viewpoint
Brandon Mitchell bitbckt @fauna San Francisco, CA United States http://thewholedoubt.com

bitbckt/resque-lifecycle 15

Lifecycle management for Resque jobs

bitbckt/libabc 5

Yet another project template.

bitbckt/libutil 0

Library of utility modules

bitbckt/lsp-mode 0

Emacs client/library for the Language Server Protocol

bitbckt/msp430 0

Texas Instruments MSP Example

startedalin23/Lunar

started time in a day

MemberEvent

fork bousquet/active_utils

Active Utils extracts commonly used modules and classes used by Active Merchant, Active Shipping, and Active Fulfillment

https://shopify.github.io/active_utils/

fork in 17 days

fork bousquet/active_merchant

Active Merchant is a simple payment abstraction library extracted from Shopify. The aim of the project is to feel natural to Ruby users and to abstract as many parts as possible away from the user to offer a consistent interface across all supported gateways.

http://activemerchant.org

fork in 18 days

fork KurtE/saleae_spiflash

SPI flash protocol analyzer for Saleae Logic

fork in 21 days

fork pabigot/symbiflow-examples

Example designs showing different ways to use SymbiFlow toolchains.

https://symbiflow.github.io

fork in a month

MemberEvent

fork elskwid/clasp

🔗 Command Line Apps Script Projects

https://developers.google.com/apps-script/guides/clasp

fork in a month

startedsimple-salesforce/simple-salesforce

started time in 2 months

startedDelgan/loguru

started time in 2 months

fork KurtE/USB2

provides USBHS device interface for Teensy3.6

fork in 2 months

startedmicnews/react-jw-player

started time in 2 months

fork KurtE/SD

SD Library for Arduino

http://arduino.cc/

fork in 2 months

pull request commenthathach/tinyusb

Add CDC NCM implementation

Wow, thank you very much for this great PR, this NCM is definitely new to me. This looks really good at quick look, though since it is pretty big addition, It will take time for decent review, I will try to review as much as I could. Meanwhile since it is still WIP, I will mark it as draft PR, feel free to mark it as ready when you think it work reliably.

@majbthrd is probably also interested in this PR as well.

j4cbo

comment created time in 2 months

Pull request review commenthathach/tinyusb

Make the disk disappear on Windows after it was ejected

 bool tud_msc_test_unit_ready_cb(uint8_t lun) {   (void) lun; -  return true; // RAM disk is always ready+  // RAM disk is ready until is not ejected

hmm the comment should be until ejected without NOT.

dobairoland

comment created time in 2 months

issue commenthathach/tinyusb

MSC device cannot be unmounted on Windows

Another way to do this is to un-set the is_removable flag in the SCSI INQUIRY response, https://github.com/hathach/tinyusb/blob/a65a0a7996f7ff4cdd50b8d229fb8f9ea01695d1/src/class/msc/msc_device.c#L339

dobairoland

comment created time in 2 months

push eventjanestreet/core

Xavier Clerc

commit sha be0e9dd13df3ba63778b59e4befeb5cebbff9664

v0.15~preview.124.03+65

view details

push time in 2 months

push eventjanestreet/async_unix

Xavier Clerc

commit sha 471679ab8b1f66f562c63999cf8311f8c138adb1

v0.15~preview.124.03+65

view details

push time in 2 months

PR opened hathach/tinyusb

Add dcd_edpt_close() to esp32-s2

Describe the PR Implement dcd_edpt_close() to esp32-s2. This referred to st/synopsys implementation.

Additional context The examples which support esp32-s2 are tested, include a modification version of uac2_headset.

Relate to #340.

+110 -24

0 comment

1 changed file

pr created time in 2 months

pull request commenthathach/tinyusb

CDC without DTR being set

The issue can be reproduced with the cdc_msc_freertos example as well by not checking tud_cdc_available() before attempting to read:

Rebooting...
ESP-ROM:esp32s2-rc4-20191025
Build:Oct 25 2019
rst:0x3 (RTC_SW_SYS_RST),boot:0x8 (SPI_FAST_FLASH_BOOT)
Saved PC:0x4002330d
SPIWP:0xee
mode:DIO, clock div:1
load:0x3ffe6100,len:0x8
load:0x3ffe6108,len:0x1814
load:0x4004c000,len:0x9d0
load:0x40050000,len:0x2e30
entry 0x4004c1ec
I (48) boot: ESP-IDF v4.3-dev-1728-g2fc1d7f544-dirty 2nd stage bootloader
I (49) boot: compile time 11:38:28
I (49) boot: chip revision: 0
I (53) boot.esp32s2: SPI Speed      : 80MHz
I (57) boot.esp32s2: SPI Mode       : DIO
I (62) boot.esp32s2: SPI Flash Size : 2MB
I (67) boot: Enabling RNG early entropy source...
I (72) boot: Partition Table:
I (76) boot: ## Label            Usage          Type ST Offset   Length
I (83) boot:  0 nvs              WiFi data        01 02 00009000 00006000
I (90) boot:  1 phy_init         RF data          01 01 0000f000 00001000
I (98) boot:  2 factory          factory app      00 00 00010000 00100000
I (105) boot: End of partition table
I (110) esp_image: segment 0: paddr=0x00010020 vaddr=0x3f000020 size=0x06770 ( 26480) map
I (124) esp_image: segment 1: paddr=0x00016798 vaddr=0x3ffbdaf0 size=0x0462c ( 17964) load
I (132) esp_image: segment 2: paddr=0x0001adcc vaddr=0x40022000 size=0x00404 (  1028) load
I (137) esp_image: segment 3: paddr=0x0001b1d8 vaddr=0x40022404 size=0x04e40 ( 20032) load
I (151) esp_image: segment 4: paddr=0x00020020 vaddr=0x40080020 size=0x1844c ( 99404) map
I (175) esp_image: segment 5: paddr=0x00038474 vaddr=0x40027244 size=0x068ac ( 26796) load
I (189) boot: Loaded app from partition at offset 0x10000
I (190) boot: Disabling RNG early entropy source...
I (201) cache: Instruction cache 	: size 8KB, 4Ways, cache line size 32Byte
I (201) cpu_start: Pro cpu up.
I (254) cpu_start: Pro cpu start user code
I (254) cpu_start: cpu freq: 160000000
I (254) cpu_start: Application information:
I (257) cpu_start: Project name:     cdc_msc_freertos
I (262) cpu_start: App version:      0.6.0-711-gaf9f0f1c-dirty
I (269) cpu_start: Compile time:     Nov  6 2020 11:38:23
I (275) cpu_start: ELF file SHA256:  c9b3f39bfc328ec1...
I (281) cpu_start: ESP-IDF:          v4.3-dev-1728-g2fc1d7f544-dirty
I (288) heap_init: Initializing. RAM available for dynamic allocation:
I (295) heap_init: At 3FF9E000 len 00002000 (8 KiB): RTCRAM
I (301) heap_init: At 3FFC3B28 len 000384D8 (225 KiB): DRAM
I (308) heap_init: At 3FFFC000 len 00003A10 (14 KiB): DRAM
I (314) spi_flash: detected chip: generic
I (319) spi_flash: flash io: dio
W (322) spi_flash: Detected size(4096k) larger than the size in the binary image header(2048k). Using the size in the binary image header.
I (336) cpu_start: Starting scheduler on PRO CPU.
Guru Meditation Error: Core  0 panic'ed (IntegerDivideByZero). Exception was unhandled.

Core  0 register dump:
PC      : 0x4008579a  PS      : 0x00060f30  A0      : 0x80082edc  A1      : 0x3ffc35e0  
A2      : 0x00000000  A3      : 0x00000040  A4      : 0x00000000  A5      : 0x00000040  
A6      : 0x00000000  A7      : 0x3ffc35e0  A8      : 0x8008574c  A9      : 0x3ffc35b0  
A10     : 0x00000000  A11     : 0x00000000  A12     : 0x00000000  A13     : 0x00000000  
A14     : 0x00000000  A15     : 0x3ffc35b0  SAR     : 0x00000000  EXCCAUSE: 0x00000006  
EXCVADDR: 0x00000000  LBEG    : 0x00000000  LEND    : 0x00000000  LCOUNT  : 0x40023ded  

Backtrace:0x40085797:0x3ffc35e0 0x40082ed9:0x3ffc3620 0x40083681:0x3ffc3660 0x400837fa:0x3ffc36a0 0x4008b061:0x3ffc36e0 0x400294f1:0x3ffc3750


ELF file SHA256: Guru Meditation Error: Core  0 panic'ed (Unhandled debug exception). 
Debug exception reason: Stack canary watchpoint triggered (cdc) 
Core  0 register dump:
PC      : 0x40022f9a  PS      : 0x00060e36  A0      : 0x80027376  A1      : 0x3ffc3450  
A2      : 0x3ffc3480  A3      : 0x00000000  A4      : 0x00099cf0  A5      : 0x3007ee00  
A6      : 0x3ffbe328  A7      : 0x00000000  A8      : 0x3ffc347f  A9      : 0x00000031  
A10     : 0x00000008  A11     : 0x00000010  A12     : 0x00000009  A13     : 0x00000009  
A14     : 0x00060f23  A15     : 0x00000040  SAR     : 0x00000001  EXCCAUSE: 0x00000001  
EXCVADDR: 0x00000000  LBEG    : 0x00000009  LEND    : 0x00000009  LCOUNT  : 0x40024e30  

Backtrace:0x40022f97:0x3ffc3450 0x40027373:0x3ffc3470 0x40027536:0x3ffc34e0 0x40027a89:0x3ffc3530 0x40023e2e:0x3ffc3550 0x40085797:0x3ffc35e0 0x40082ed9:0x3ffc3620 0x40083681:0x3ffc3660 0x400837fa:0x3ffc36a0 0x4008b061:0x3ffc36e0 0x400294f1:0x3ffc3750


ELF file SHA256: c9b3f39bfc328ec1

Rebooting...
duempel

comment created time in 2 months

pull request commenthathach/tinyusb

CDC without DTR being set

Thank you @duempel for the ideas.

I see in my logs that everything has been initialized.

USBD init
CDC init
MSC init
VENDOR init

It is not possible for my application to write before initialization because TASK A calls tusb_init and after that it starts TASK B which in the end starts TASK C which writes to CDC.

I will try the cdc_msc_freertos example to modify and report back on the results.

duempel

comment created time in 2 months

pull request commenthathach/tinyusb

CDC without DTR being set

@hathach based on the explained behaviour from my last comment I think it is useful to provide more stability and block application mistakes. In this PR I deleted the tud_cdc_n_connected() check within the tud_cdc_n_write_flush(). What do you think about adding a tud_ready() call or introducing a ready variable for every cdc interface to check before usbd_edpt_xfer calls?

duempel

comment created time in 2 months

pull request commenthathach/tinyusb

CDC without DTR being set

@dobairoland thanks for your feedback. It's not easy to spot the cause of this issue now. As far as I understand you are using your own user application. Have you tried to run the cdc_msc_freertos example on your esp?

My first thoughts were: It seems that an endpoint transfer (dcd_edpt_xfer) is called before the endpoint was opened correctly. This could happen for example if you write and flush data before calling tusb_init (due to task priority or other reasons). This could also explain why it's working with use of tud_cdc_available() or tud_cdc_connected(). The use could delay your endpoint access calls until it's fully initialized.

I would recommend to 1st try the cdc_msc_freertos exmaple. If you already did this please turn on TinyUSB's logging function for debugging (CFG_TUSB_DEBUG = 2). We could see here if functions were called in wrong order.

Unfortunately, this doesn't solve my original problem I was hoping to solve: to be able to read and write while DTR is not set.

This is exactly what this PR is trying to solve. Let's hope to find the cause as soon as possible.

duempel

comment created time in 2 months

pull request commenthathach/tinyusb

CDC without DTR being set

I'm sorry for posting again. tud_cdc_available() never true for me so tud_cdc_connected() should be used instead. Then I can read with minicom what was sent and works fine for me.

Unfortunately, this doesn't solve my original problem I was hoping to solve: to be able to read and write while DTR is not set.

duempel

comment created time in 2 months

pull request commenthathach/tinyusb

CDC without DTR being set

Ok, I've fixed my previous issue with a tud_cdc_available() check.

duempel

comment created time in 2 months

issue commenthathach/tinyusb

MSC device cannot be unmounted on Windows

We actually use the non-disappearance in CircuitPython so that we can use "Eject" to flush any remaining writes to the disk, but then not have to unplug and plug it back in. There is no other simple way to flush writes. This is particularly important because Windows in the past has not flushed writes to FAT12 drives for up to 90 seconds. Supposedly this has been fixed in newer versions of Windows 10, but I haven't had a chance to test it yet.

I'd like this to have a compile-time switch to disable it, for this reason.

dobairoland

comment created time in 2 months

more